Flash memory is a common type of non-volatile semiconductor memory device. Non-volatile refers to the trait of retaining stored data when power is turned off. Because flash memory is non-volatile, it is commonly used in power conscious applications, such as in battery powered cellular phones, personal digital assistants (PDAs), and in portable mass storage devices such as memory sticks.
Flash memory devices typically include multiple individual components formed on or within a substrate. Such devices often include a high density section and a low density section. For example, a flash memory may include one or more high density core regions and a low density peripheral portion formed on a single substrate. The high density core regions typically include arrays of individually addressable, substantially identical floating-gate type memory cells. The low density peripheral portion may include input/output (I/O) circuitry, circuitry for selectively addressing the individual cells (such as decoders for connecting the source, gate and drain of selected cells to predetermined voltages or impedances to effect designated operations of the cell, such as programming, reading or erasing), and voltage regulation and supply circuitry.
In conventional flash memory architecture, memory cells within the core portion are coupled together in a circuit configuration in which each memory cell has a drain, a source, and a stacked gate. In operation, memory cells may be addressed by circuitry in the peripheral portion to perform functions such as reading, erasing, and programming of the memory cells. In a typical operation, flash memory cells may be programmed by a hot electron injection process that injects electrons from the channel region to the charge storage layer to create a negative charge within the charge storage layer. The electron injection may be performed by applying a drain-to-source bias along with a high positive voltage on the control gate. The high voltage on the control gate inverts the channel region while the drain-to-source bias accelerates electrons towards the drain region. The electrons are generally accelerated towards the drain region, with some of the electrons being re-directed toward the bottom oxide layer. The accelerated electrons gain enough kinetic energy to cross the bottom oxide layer and enter the charge storage layer. The charge storage layer stores the injected electrons within traps.
Once programmed, the charge storage layer stores charge for the memory cell. The negatively charged charge storage layer causes the threshold voltage of the memory cell to increase, which changes the magnitude of the current flowing between the source and the drain at various control gate voltages. Reading the programmed, or non-programmed, state of the memory cell may be based on the magnitude of the current flowing between the source and drain at a predetermined control gate voltage.